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NXP Semiconductors /LPC176x5x /USB /DMARCLR

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Interpret as DMARCLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EPRCLR0)EPRCLR0 0 (EPRCLR1)EPRCLR1 0 (EPRCLR2)EPRCLR2 0 (EPRCLR3)EPRCLR3 0 (EPRCLR4)EPRCLR4 0 (EPRCLR5)EPRCLR5 0 (EPRCLR6)EPRCLR6 0 (EPRCLR7)EPRCLR7 0 (EPRCLR8)EPRCLR8 0 (EPRCLR9)EPRCLR9 0 (EPRCLR10)EPRCLR10 0 (EPRCLR11)EPRCLR11 0 (EPRCLR12)EPRCLR12 0 (EPRCLR13)EPRCLR13 0 (EPRCLR14)EPRCLR14 0 (EPRCLR15)EPRCLR15 0 (EPRCLR16)EPRCLR16 0 (EPRCLR17)EPRCLR17 0 (EPRCLR18)EPRCLR18 0 (EPRCLR19)EPRCLR19 0 (EPRCLR20)EPRCLR20 0 (EPRCLR21)EPRCLR21 0 (EPRCLR22)EPRCLR22 0 (EPRCLR23)EPRCLR23 0 (EPRCLR24)EPRCLR24 0 (EPRCLR25)EPRCLR25 0 (EPRCLR26)EPRCLR26 0 (EPRCLR27)EPRCLR27 0 (EPRCLR28)EPRCLR28 0 (EPRCLR29)EPRCLR29 0 (EPRCLR30)EPRCLR30 0 (EPRCLR31)EPRCLR31

Description

USB DMA Request Clear

Fields

EPRCLR0

Control endpoint OUT (DMA cannot be enabled for this endpoint and the EP0 bit must be 0).
EPRCLR1

Control endpoint IN (DMA cannot be enabled for this endpoint and the EP1 bit must be 0).
EPRCLR2

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR3

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR4

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR5

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR6

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR7

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR8

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR9

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR10

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR11

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR12

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR13

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR14

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR15

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR16

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR17

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR18

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR19

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR20

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR21

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR22

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR23

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR24

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR25

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR26

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR27

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR28

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR29

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR30

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.
EPRCLR31

Clear the endpoint xx (2 <= xx <= 31) DMA request. 0 = No effect 1 = Clear the corresponding bit in USBDMARSt.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data